(1) Field of the Invention
The present invention relates to a voltage detecting device made by capacitors connected in series. This voltage detecting device is used, for example, in an electrically erasable and programmable read-only memory (E.sup.2 PROM), a nonvolatile random access memory (NOVRAM), and the like.
(2) Description of the Related Art
In an E.sup.2 PROM, NOVRAM, and the like, the write/erase voltage V.sub.PP is remarkably higher than the normal power supply voltage V.sub.CC (for example, 5 V). Such a write/erase voltage V.sub.PP is 20 V to 25 V. In the prior art, this write/erase voltage V.sub.PP is supplied from the exterior. However, in recent years, a step-up circuit has been provided in each chip to generate an internal write/erase voltage (IVP). According to this, the external power supplies and external terminals (pads) of the chips can be reduced.
During a write/erase mode, a clock signal is supplied to the step-up circuit, thereby increasing the write/erase voltage IVP. As a result, this high voltage IVP is applied to a memory cell so as to perform a write/erase operation thereupon due to the tunneling effect. In this case, however, a write/erase voltage detecting device is required for detecting the write/erase voltage IVP so as to prevent the voltage from being higher than a predetermined value.
Note that, if the write/erase voltage IVP is higher than the predetermined value, the cell to which the write/erase voltage is applied may be destroyed or the life-time thereof reduced.
A prior art voltage detecting device includes a voltage dividing circuit formed by two capacitors connected in series and an inverter circuit for detecting whether the potential at the common node of the capacitors reaches a predetermined value. Note that such an inverter circuit is suitable for detecting a relatively low voltage. Therefore, since a relatively high voltage is reduced to a relatively low voltage by the voltage dividing circuit, such a relatively high voltage can be detected indirectly by the inverter circuit.
In the above-mentioned prior art voltage detecting device, the upper side capacitor is conventionally formed by two polycrystalline silicon layers having a silicon dioxide layer therebetween. In this case, the silicon dioxide layer is obtained by oxidizing one of the polycrystalline silicon layers. However, such a silicon dioxide layer has a low tunneling emission start electric field strength, such as 1 to 3 MV/cm, so the silicon dioxide layer has to be thick so as to avoid tunneling emission, increasing the occupied area thereof. In addition, charges at the node of the capacitors leak due to the tunneling effect, so that the potential at the node is shifted. Further, traps are formed in the silicon dioxide layer obtained by oxidizing polycrystalline silicon. Therefore, charges are trapped at the traps, affecting the potential at the above-mentioned node. Thus, the dividing ratio of voltage by the voltage dividing circuit is not accurate. Accordingly, the above-mentioned voltage detecting device cannot accurately detect whether a high voltage reaches the predetermined value.